High-Performance Switch/Router Design:
Theory and Practice
The rapid evolution of high-speed switches, routers, and cross-connects over the past few years has lead to several advances in the theory and practice of high-performance switch architectures. With the rapid convergence of packet and circuit-switched
services, it is crucial for designers and systems engineers to grasp and appreciate this evolution and new design paradigms. Whether it is lookups and packet classification or software design in the control plane, a number of new best practices have
shaped how modern systems are architected.
Understanding the major developments of the last decade in this field, and having insights into future trends is crucial for building advanced software, chips, systems, and networks.
With this goal, this workshop covers:
- Switch architectures & fabrics: features, properties, applicability, practical realizations
- Analysis of data path processing: through a router, cross-connect, hybrid packet/TDM switch
- Comparative evaluation: Cisco Catalyst 6K family (large enterprise) versus the Juniper M40/160 (metro/core) and Gibson T640 (core); discussion of the key architectural aspects of edge/metro boxes, such as Unisphere/Juniper's ERX and Foundry's BigIron family.
- Forwarding, lookups, packet classification: methods, hardware realizations, and performance issues
- Scheduler design: theoretical limits, practical algorithms and implementations
- Output scheduling: fair queueing algorithms, practical considerations, QoS guarantees
- Considerations in modern router design: high-availability architectures, scalability, building services
- Techniques for building very high-capacity switches (time permitting): parallelism, optical fabrics (putting optics inside of routers)